This application claims the benefit of a Japanese Patent Application No. 2000-298969 filed Sep. 29, 2000, in the Japanese Patent Office.
1. Field of the Invention
The present invention generally relates to level shift circuits for converting a power supply voltage system of an input end to another power supply voltage system, and more particularly to a level shift circuit which shifts both levels of a high voltage power supply and a low voltage power supply of the power supply voltage system.
2. Description of the Related Art
FIG. 1 is a circuit diagram showing an example of a conventional level shift circuit.
In FIG. 1, a level shift circuit 100 includes an initial stage circuit section 101 and a final stage circuit section 102. The initial stage circuit section 101 converts an input signal received via an input terminal IN into a signal having a high-level voltage of +5 V and having a low-level voltage of 0 V. The final stage circuit section 102 converts the output signal of the initial stage circuit section 101 into a signal having a high level which is shifted to a voltage of +10 V. The initial stage circuit section 101 is formed by inverter circuits 103 and 104 which are connected in series, and output signals of the inverter circuits 103 and 104 are supplied to the final stage circuit section 102. A power supply voltage of +5 V is applied to a positive side power supply input terminal of each of the inverter circuits 103 and 104, and a power supply voltage of 0 V is applied to a negative side power supply input terminal of each of the inverter circuits 103 and 104.
On the other hand, the final stage circuit section 102 is formed by inverter circuits 105 and 107, and P-channel MOS transistors (hereinafter simply referred to as PMOS transistors) 106 and 108. The inverter circuit 105 receives the output signal of the inverter circuit 104. In addition, a power supply voltage of +10 V is applied to a positive side power supply input terminal of the inverter circuit 105 via the PMOS transistor 106, and a power supply voltage of 0 V is applied to a negative side power supply input terminal of the inverter circuit 105. Similarly, the inverter circuit 107 receives the output signal of the inverter circuit 103. In addition, the power supply voltage of +10 V is applied to a positive side power supply input terminal of the inverter circuit 107 via the PMOS transistor 108, and the power supply voltage of 0 V is applied to a negative side power supply input terminal of the inverter circuit 107. An output signal of the inverter circuit 107 is applied to a gate of the PMOS transistor 106, and an output signal of the inverter circuit 105 is applied to a gate of the PMOS transistor 108.
The output signal of the inverter circuit 104 is subjected to a level shift by the inverter circuit 105 and the PMOS transistor 106, so that a high-level voltage is level-shifted to +10 V and output from an output terminal OUT1 Similarly, the output signal of the inverter circuit 103 is subjected to a level shift by the inverter circuit 107 and the PMOS transistor 108, so that a high-level voltage is level-shifted to +10 V and output from an output terminal OUT2.
However, according to this conventional level shift circuit, it is only possible to shift the level of the high-level voltage or the low-level voltage of the input signal. For this reason, in order to shift the level of both the high-level voltage and the low-level voltage of the input signal, it is necessary to provide another level shift circuit. In other words, in the case where the level shift circuit 100 is used to shift the level of the high-level voltage of the input signal, it is necessary to provide another level shift circuit to soft the level of the low-level voltage of the input signal. Therefore, there was a problem in that two level shift circuits were necessary in order to shift the level of both the high-level voltage and the low-level voltage of the input signal.
Accordingly, it is a general object of the present invention to provide a novel and useful level shift circuit in which the problem described above is eliminated.
Another and more specific object of the present invention is to provide a level shift circuit which can shift the level of both a high-level voltage and a low-level voltage of an input signal.
Still another object of the present invention is to provide a level shift circuit comprising an initial stage circuit section, including a first inverter circuit portion coupled to a first high voltage power supply and to a first low voltage power supply, converting an input signal into a signal having a voltage level of the first high voltage power supply as a high level and a voltage level of the first low voltage power supply as a low level; an intermediate stage circuit section, including a second inverter circuit portion coupled to the first high voltage power supply and to a second low voltage power supply which supplies a voltage level lower than the first low voltage power supply, level-shifting the signal output from the initial stage circuit section into a signal having the voltage level of the first high voltage power supply as a high level and the voltage level of the second low voltage power supply as a low level, in response to the signal output from the initial stage circuit section; and a final stage circuit section, including a third inverter circuit portion coupled to the second low voltage power supply and to a second high voltage power supply which supplies a voltage level higher than the first high voltage power supply, level-shifting the signal output from the intermediate stage circuit section into a signal having the voltage level of the second high voltage power supply as a high level and the voltage level of the second low voltage power supply as a low level, in response to the signal output from the intermediate stage circuit section. According to the level shift circuit of the present invention, it is possible to shift the level of both a high-level voltage and a low-level voltage of an input signal by use of a simple circuit structure.
The intermediate stage circuit section may include an output end, and the second inverter circuit portion may include a first transistor coupled between the first high voltage power supply and the output end and responsive to the signal output from the initial stage circuit section, and a second transistor coupled between the output end and the second low voltage power supply. In this case, the second transistor of the second inverter circuit portion may have a control signal input terminal, and the level shift circuit may further comprise a voltage generating circuit which generates a voltage which is applied to the control signal input terminal of the second transistor.
Further, the voltage generating circuit may apply the voltage generated thereby to the second transistor of the second inverter circuit portion when each transistor within the second inverter circuit portion is in a ratioed state.
In addition, the voltage generating circuit may apply the voltage generated thereby to the second transistor of the second inverter circuit portion, so that a ratio of a first resistance between the first high voltage power supply and the second low voltage power supply and a second resistance between the output end of the intermediate stage circuit section and the second low voltage power supply,becomes a predetermined value.
A further object of the present invention is to provide a level shift circuit comprising an initial stage circuit section, coupled to a first high voltage power supply and to a first low voltage power supply, converting an input signal into a signal having a voltage level of the first high voltage power supply as a high level and a voltage level of the first low voltage power supply as a low level; an intermediate stage circuit section, coupled to the first high voltage power supply and to a second low voltage power supply which supplies a voltage level lower than the first low voltage power supply, level-shifting the signal output from the initial stage circuit section into a signal having the voltage level of the first high voltage power supply as a high level and the voltage level of the second low voltage power supply as a low level, in response to the signal output from the initial stage circuit section; and a final stage circuit section, coupled to the second low voltage power supply and to a second high voltage power supply which supplies a voltage level higher than the first high voltage power supply, level-shifting the signal output from the intermediate stage circuit section into a signal having the voltage level of the second high voltage power supply as a high level and the voltage level of the second low voltage power supply as a low level, in response to the signal output from the intermediate stage circuit section. According to the level shift circuit of the present invention, it is possible to shift the level of both a high-level voltage and a low-level voltage of an input signal by use of a simple circuit structure.
Another object of the present invention is to provide a level shift circuit comprising an initial stage circuit section converting an input signal into a signal having a first high-level voltage and a first low-level voltage; an intermediate stage circuit section outputting a signal by level-shifting the first low-level voltage of the signal output from the initial stage circuit section to a second low-level voltage, in response to the signal output from the initial stage circuit section; and a final stage circuit section outputting a signal by level-shifting the first high-level voltage of the signal output from the intermediate stage circuit section to a second high-level voltage, in response to the signal output from the intermediate stage circuit section. According to the level shift circuit of the present invention, it is possible to shift the level of both a high-level voltage and a low-level voltage of an input signal by use of a simple circuit structure.
Still another object of the present invention is to provide a level shift circuit comprising an initial stage circuit section converting an input signal into a signal having a first high-level voltage and a first low-level voltage; an intermediate stage circuit section outputting a signal by level-shifting one of the first low-level and high-level voltages of the signal output from the initial stage circuit section to a corresponding one of second low-level and high-level voltages, in response to the signal output from the initial stage circuit section; and a final stage circuit section outputting a signal by level-shifting the other of the first low-level and high-level voltages of the signal output from the intermediate stage circuit section to the other of the second low-level and high-level voltages, in response to the signal output from the intermediate stage circuit section. According to the level shift circuit of the present invention, it is possible to shift the level of both a high-level voltage and a low-level voltage of an input signal by use of a simple circuit structure.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.